SENIOR PRINCIPAL BACKEND DESIGN ENGINEER - CORK CITY- IRELAND

Location Cork
Contact name: Micheal O’Maoldomhnaigh

Contact email: micheal@softwareplacements.ie
Job ref: 1254
Published: 3 months ago

Client:

Our client a leading Multinational Semiconductor EDA Industry leader requires Senior Principal Backend Design Engineer for role based in Cork City, Ireland.

Role:


You will be joining a team Controller IP Team with long established Controller development sites in Europe, US, and India. The team develops leading edge Intellectual Property (IP) for a variety of High-Tech Markets. The IP solutions allows customers to tackle IP-to-SoC development in a system context, enabling them to focus on product differentiation and to reduce time to volume.



Responsibilities:
  • Understanding proper handling of multiple asynchronous clock domains and their crossings
  • Understanding of Lint checks and proper resolution of errors
  • Understanding of synthesis timing constraints, static timing analysis and constraint development
  • Understanding of fundamental physical design flows and stages
  • Candidate should be able to debug and contribute to DFT architectures for hard IP, soft IP, and integrated IP test chips.
  • Liaison between Controller, PHY and Test chip teams.
  • Technical leadership during the development of complex Ethernet IP development
  • Planning of activities and milestones for the Digital Controller Development teams.
  • Leadership of cross-functional technical meetings.
  • Support customer pre-sales and post-sales meetings.
  • Participate in Technical Review Meetings and Checklist Reviews as part of ISO-9001.



Education:
 
  • Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline.

Experience:
 
  • 10-15 years’ experience in microelectronics/EDA industry.
  • In depth experience with Logic Synthesis, Static Timing Analysis and Constraints Development. 
  • Experience in Ethernet Systems, or other packet Protocol.
  • Experience in top-down and bottom-up digital design processes.
  • Experience of Verilog/System Verilog RTL Design
  • Experience of Front-end design tools covering LINT, Synthesis, CDC Analysis essential.
  • Scripting Experience (Perl, TCL, Python)
  • Experience of Technical Team leadership essential.
  • Excellent oral and written English essential.
  • Self-motivated with excellent planning, interpersonal, and communication skills.


Additional Skills/Preferences:                     
  • Experience of SoC Architecture and Development
  • Experience of Quality processes, such as ISO-9001 & ISO-26262 preferred.
  • Experience of Front-end design tools covering LINT, Synthesis, CDC Analysis preferred.
Contact:

For further information please contact Mícheál at Software Placements on 00353 1 5254642 or email micheal@softwareplacements.ie